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a
High Accuracy anyCAPTM 200 mA Low Dropout Linear Regulator ADP3303
FUNCTIONAL BLOCK DIAGRAM
ADP3303
OUT CC DRIVER gm R2 BANDGAP REF GND R1 IN THERMAL PROTECTION Q2 SD Q1
FEATURES High Accuracy Over Line and Load 0.8% @ at +25 C, 1.4% Over Temperature Ultralow Dropout Voltage: 180 mV (Typ) @ 200 mA Requires Only CO = 0.47 F for Stability anyCAP = Stable with All Types of Capacitors (Including MLCC) 3.2 V to 12 V Supply Range Current and Thermal Limiting Low Noise Dropout Detector Low Shutdown Current: < 1 A Thermally Enhanced SO-8 Package Excellent Line and Load Regulation Performance APPLICATIONS Cellular Telephones Notebook, Palmtop Computers Battery Powered Systems Portable Instruments Post Regulator for Switching Supplies Bar Code Scanners
ERR
NR 3
ADP3303-5.0
VIN C1 0.47 F SD
5 7 8
IN
OUT
1 2
VOUT = +5V 330k EOUT C2 0.47 F
ERR 6 GND
4
ON OFF
GENERAL DESCRIPTION
SD
The ADP3303 is a member of the ADP330x family of precision low dropout anyCAP voltage regulators. The ADP3303 stands out from the conventional LDOs with a novel architecture, an enhanced process and a new package. Its patented design requires only a 0.47 F output capacitor for stability. This device is insensitive to capacitor Equivalent Series Resistance (ESR) and is stable with any good quality capacitor, including ceramic types (MLCC) for space restricted applications. The ADP3303 achieves exceptional accuracy of 0.8% at room temperature and 1.4% overall accuracy over temperature, line and load regulations. The dropout voltage of the ADP3303 is only 180 mV (typical) at 200 mA. In addition to the new architecture and process, ADI's new proprietary thermally enhanced package (Thermal Coastline) can handle 1 W of power dissipation without external heatsink or large copper surface on the PC board. This keeps PC board real estate to a minimum and makes the ADP3303 very attractive for use in portable equipment. The ADP3303 operates with a wide input voltage range from 3.2 V to 12 V and delivers a load current in excess of 200 mA.
Figure 1. Typical Application Circuit
It features an error flag that signals when the device is about to lose regulation or when the short circuit or thermal overload protection is activated. Other features include shutdown and optional noise reduction capabilities. The ADP330x anyCAP LDO family offers a wide range of output voltages and output current levels: ADP3300 (50 mA, SOT-23) ADP3301 (100 mA) ADP3302 (100 mA, Dual Output) ADP3307 (100 mA, SOT-23-6) ADP3308 (50 mA, SOT-23-5) ADP3309 (100 mA, SOT-23-5)
anyCAP is a trademark of Analog Devices Inc.
REV. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 (c) Analog Devices, Inc., 1998
ADP3303-xx-SPECIFICATIONS (@ T = -20 C to +85 C, V = 7 V, C = 0.47 otherwise noted)
A IN IN 1
F, COUT = 0.47 F, unless
Typ Max Units
Parameter OUTPUT VOLTAGE ACCURACY
Symbol VOUT
Conditions VIN = VOUTNOM +0.5 V to 12 V IL = 0.1 mA to 200 mA TA = +25C VIN = VOUTNOM +0.5 V to 12 V IL = 0.1 mA to 200 mA
Min
-0.8 -1.4 0.01 0.013 1.5 0.25 1.12 0.18 0.02 0.003 2.0
+0.8 +1.4
% % mV/V mV/mA
LINE REGULATION LOAD REGULATION GROUND CURRENT GROUND CURRENT IN DROPOUT DROPOUT VOLTAGE
VO VIN VO IL IGND IGND VDROP
VIN = VOUTNOM +0.5 V to 12 V TA = +25C IL = 0.1 mA to 200 mA TA = +25C IL = 200 mA IL = 0.1 mA VIN = 2.5 V IL = 0.1 mA VOUT = 98% of VOUTNOM IL = 200 mA IL = 10 mA IL = 1 mA ON OFF 0 < VSD < 5 V 5 VSD 12 V @ VIN = 12 V VSD = 0, VIN = 12 V TA = +25C VSD = 0, VIN = 12 V TA = +85C TA = +25C @ VIN = 12 V TA = +85C @ VIN = 12 V VEO = 5 V ISINK = 400 A VIN = VOUTNOM + 1 V f = 10 Hz-100 kHz CNR = 0 CNR = 10 nF, CL = 10 F
4 0.4 2.5 0.4 0.07 0.03 0.3 1 22 1 5 2.5 4 13
mA mA mA V V V V V A A A A A A A V mA V rms V rms
SHUTDOWN THRESHOLD SHUTDOWN PIN INPUT CURRENT GROUND CURRENT IN SHUTDOWN MODE
VTHSD ISDIN IQ
OUTPUT CURRENT IN SHUTDOWN MODE ERROR PIN OUTPUT LEAKAGE ERROR PIN OUTPUT "LOW" VOLTAGE PEAK LOAD CURRENT OUTPUT NOISE @ 5 V OUTPUT
IOSD
IEL VEOL ILDPK VNOISE
0.15 300 100 30
0.3
NOTES 1 Ambient temperature of +85C corresponds to a typical junction temperature of +125C under typical full load test conditions. Specifications subject to change without notice.
-2-
REV. A
ADP3303
ABSOLUTE MAXIMUM RATINGS* PIN FUNCTION DESCRIPTIONS
Input Supply Voltage . . . . . . . . . . . . . . . . . . . -0.3 V to +16 V Shutdown Input Voltage . . . . . . . . . . . . . . . . -0.3 V to +16 V Error Flag Output Voltage . . . . . . . . . . . . . . . -0.3 V to +16 V Noise Bypass Pin Voltage . . . . . . . . . . . . . . . . -0.3 V to +5 V Power Dissipation . . . . . . . . . . . . . . . . . . . Internally Limited Operating Ambient Temperature Range . . . . -20C to +85C Operating Junction Temperature Range . . . -20C to +125C JA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96C/W JC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55C/W Storage Temperature Range . . . . . . . . . . . . -65C to +150C Lead Temperature Range (Soldering 10 sec) . . . . . . . +300C Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . +215C Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . +220C
*This is a stress rating only; operation beyond these limits can cause the device to be permanently damaged.
Pin 1&2
Mnemonic OUT
Function Output of the Regulator. Bypass to ground with a 0.47 F or larger capacitor. Pins 1 and 2 must be connected together for proper operation. Noise Reduction Pin. Used for reduction of the output noise. (See text for details.) No connection if not used. Ground Pin. Active Low Shutdown Pin. Connect to ground to disable the regulator output. When shutdown is not used, this pin should be connected to the input pin. Open Collector Output. Goes low to indicate that the output is about to go out of regulation. Regulator Input. Pins 7 and 8 must be connected together for proper operation.
3
NR
4 5
GND SD
ORDERING GUIDE
6 Package Option* SO-8 SO-8 SO-8 SO-8 SO-8
ERR
Model ADP3303AR-2.7 ADP3303AR-3 ADP3303AR-3.2 ADP3303AR-3.3 ADP3303AR-5
Output Voltage 2.7 V 3.0 V 3.2 V 3.3 V 5.0 V
7&8
IN
PIN CONFIGURATION
Contact the factory for the availability of other output voltage options. *SO = Small Outline.
OUT 1 OUT 2
8 IN
Other Members of anyCAP Family 1
ADP3303
7 IN
Model ADP3300 ADP3301 ADP3302 ADP3307 ADP3308 ADP3309
Output Current 50 mA 100 mA 100 mA 100 mA 50 mA 100 mA
Package Options2 SOT-23-6 SO-8 SO-8 SOT-23-6 SOT-23-5 SOT-23-5
TOP VIEW 6 ERR (Not to Scale) 5 SD GND 4 NR 3
Comments High Accuracy High Accuracy Dual Output Small Size Improved LP2980 Improved MIC5205
NOTES 1 See individual data sheets for detailed ordering information. 2 SO = Small Outline, SOT = Surface Mount.
CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADP3303 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
REV. A
-3-
ADP3303 -Typical Performance Characteristics
3.3005 3.3000
OUTPUT VOLTAGE - Volts
IL = 0mA IL = 10mA VOUT = 3.3V
3.2005 3.2000
VIN = 7V VOUT = 3.2V
1.0
VOUT = 3.3V IL = 0mA
OUTPUT VOLTAGE - Volts
GROUND CURRENT - A
0 20 40 60 80 100 120 140 160 180 200 OUTPUT LOAD - mA
3.2995 3.2990 3.2985 3.2980 3.2975 3.2970 3.3 4
0.8
IL = 100mA
3.1995 3.1990 3.1985 3.1980 3.1975
0.6
IL = 200mA
0.4
0.2
5
6 7 8 9 10 11 12 13 14 15 16 INPUT VOLTAGE - Volts
0 0
2
4 6 8 10 12 INPUT VOLTAGE - Volts
14
16
Figure 2. Line Regulation: Output Voltage vs. Supply Voltage
Figure 3. Output Voltage vs. Load Current
Figure 4. Quiescent Current vs. Supply Voltage
1600 1400
0.2
2500 VIN = 7V
0.1 OUTPUT VOLTAGE - %
GROUND CURRENT - A
0.0 IL = 0mA -0.1
GROUND CURRENT -
1200 1000 800 IL = 0 TO 200mA 600 400 200 0 20 40 60 80 100 120 140 160 180 200 OUTPUT LOAD - mA
A
2000 IL = 200mA 1500
1000
-0.2
-0.3
500 IL = 0mA 0 -25
-0.4 -45 -25 -5
15
35
55
75
95 115 135
-5
TEMPERATURE - C
15 35 55 75 95 TEMPERATURE - C
115 135
Figure 5. Quiescent Current vs. Load Current
Figure 6. Output Voltage Variation % vs. Temperature
Figure 7. Quiescent Current vs. Temperature
180
5 VOUT = 3.3V
8.0 VIN 7.0
INPUT-OUTPUT VOLTAGE - Volts
INPUT-OUTPUT VOLTAGE - mV
160 140 120 100 80 60 40 20 0 0 20 40 60 80 100 120 140 160 180 200 OUTPUT LOAD - mA
4
INPUT-OUTPUT VOLTAGE - Volts
6.0 5.0 4.0 3.0 2.0 1.0 0 0 20 40 60 VSD = VIN OR 3V CL = 0.47 F RL = 16.5 VOUT = 3.3V 80 100 120 140 160 180 200 TIME - s VOUT
3
2 RL = 16.5 1
0
0
1
2 4 3 2 3 INPUT VOLTAGE - Volts
1
0
Figure 8. Dropout Voltage vs. Output Current
Figure 9. Power-Up/Power-Down
Figure 10. Power-Up Transient
-4-
REV. A
ADP3303
5.02 VOUT = 5V 5.01 5.00 4.99
Volts
5.02 VOUT = 5V 5.01 5.00 4.99
Volts
3.310 VOUT = 3.3V 3.305 3.300 3.295 3.290 VOUT
4.98
Volts
25 , 0.47 F LOAD
5k , 0.47 F LOAD
4.98
CL = 0.47 F
mA
7.5 7.0
VIN
7.5 7.0
VIN
200 10
I(VOUT)
0
20 40
60 80 100 120 140 160 180 200 TIME - s
0
40
80 120 160 200 240 280 320 360 400 TIME - s
0
200
400 600 TIME - s
800
1000
Figure 11. Line Transient Response
Figure 12. Line Transient Response
Figure 13. Load Transient for 10 mA to 200 mA Pulse
3.310 VOUT = 3.3V
Volts
VIN = 7V 3.5 0 400 300
mA
VIN = 7V 4 CL = 0.47 F, RL = 3.3k 3.3V VOUT
3.305
Volts
3.3V VOUT
3.300 3.295 3.290 200 I(VOUT)
VOUT
3 CL = 10 F, RL = 16.5 2
Volts
CL = 10 F
CL = 10 F, RL = 3.3k 1 0 5 3 0 SD
IOUT 200 100
mA
10
0
0 200 400 600 TIME - s 800 1000
0
1
2 3 TIME - sec
4
5
0
40
80 120 TIME - s
160
200
Figure 14. Load Transient for 10 mA to 200 mA Pulse
Figure 15. Short Circuit Current
Figure 16. Turn On
4 C = 0.47 F R = 16.5 ON 3.3V OUTPUT 3
RIPPLE REJECTION - dB
V/ Hz
0 -10 -20 -30 -40 -50 -60 -70 -80 -90 ac 100 1k 10k 100k FREQUENCY - Hz 1M 10M bd a d a. 0.47 F, RL = 33k b. 0.47 F, RL = 16.5 c. 10 F, RL = 33k d. 10 F, RL = 16.5 VOUT = 3.3V b
10
0.47 F BYPASS PIN 7, 8 TO PIN 3
VOUT = 5V, CL = 0.47 F, IL = 1mA, CNR = 0
2
Volts
VOLTAGE NOISE SPECTRAL DENSITY -
1
VOUT = 3.3V, CL = 0.47 F, IL = 1mA, CNR = 0
VOUT 1 0
c
0.1
VOUT = 2.7-5.0V, CL = 10 F, IL = 1mA, CNR = 10nF
5 VSD 0 0 5 10 15 TIME - s 20 25
-100 10
0.01 100
1k 10k FREQUENCY - Hz
100k
Figure 17. Turn Off
Figure 18. Power Supply Ripple Rejection
Figure 19. Output Noise Density
REV. A
-5-
ADP3303
THEORY OF OPERATION
The new anyCAP LDO ADP3303 uses a single control loop for regulation and reference functions. The output voltage is sensed by a resistive voltage divider consisting of R1 and R2, which is varied to provide the available output voltage options. Feedback is taken from this network by way of a series diode (D1) and a second resistor divider (R3 and R4) to the input of an amplifier.
IN Q1 OUT COMPENSATION R1 CAPACITOR ATTENUATION (VBANDGAP/VOUT) PTAT VOS R4 R3 D1 (a) PTAT CURRENT R2 GND RLOAD CLOAD
This is no longer true with the ADP3303 anyCAP LDO. It can be used with virtually any capacitor, with no constraint on the minimum ESR. The innovative design allows the circuit to be stable with just a small 0.47 F capacitor on the output. Additional advantages of the pole splitting scheme include superior line noise rejection and very high regulator gain, which leads to excellent line and load regulation. An impressive 1.4% accuracy is guaranteed over line, load and temperature. Additional features of the circuit include current limit, thermal shutdown and noise reduction. Compared to standard solutions that give warning after the output has lost regulation, the ADP3303 provides improved system performance by enabling the ERR Pin to give warning before the device loses regulation. As the chip's temperature rises above 165C, the circuit activates a soft thermal shutdown, indicated by a signal low on the ERR Pin, to reduce the current to a safe level. To reduce the noise gain of the loop, the node of the main divider network (a) is made available at the noise reduction (NR) pin, which can be bypassed with a small capacitor (10 nF-100 nF).
APPLICATION INFORMATION Capacitor Selection
NONINVERTING WIDEBAND DRIVER
gm
ADP3303
Figure 20. Functional Block Diagram
A very high gain error amplifier is used to control this loop. The amplifier is constructed in such a way that at equilibrium it produces a large, temperature proportional input "offset voltage" that is repeatable and very well controlled. The temperatureproportional offset voltage is combined with the complementary diode voltage to form a "virtual bandgap" voltage, implicit in the network, although it never appears explicitly in the circuit. Ultimately, this patented design makes it possible to control the loop with only one amplifier. This technique also improves the noise characteristics of the amplifier by providing more flexibility on the tradeoff of noise sources that leads to a low noise design. The R1, R2 divider is chosen in the same ratio as the bandgap voltage to the output voltage. Although the R1, R2 resistor divider is loaded by the diode D1, and a second divider consisting of R3 and R4, the values are chosen to produce a temperature stable output. This unique arrangement specifically corrects for the loading of the divider so that the error resulting from base current loading in conventional circuits is avoided. The patented amplifier controls a new and unique noninverting driver that drives the pass transistor, Q1. The use of this special noninverting driver enables the frequency compensation to include the load capacitor in a pole splitting arrangement to achieve reduced sensitivity to the value, type and ESR of the load capacitance. Most LDOs place strict requirements on the range of ESR values for the output capacitor because they are difficult to stabilize due to the uncertainty of load capacitance and resistance. Moreover, the ESR value, required to keep conventional LDOs stable, changes depending on load and temperature. These ESR limitations make designing with LDOs more difficult because of their unclear specifications and extreme variations over temperature.
Output Capacitors: as with any micropower device, output transient response is a function of the output capacitance. The ADP3303 is stable with a wide range of capacitor values, types and ESR. A capacitor as low as 0.47 F is all that is needed for stability; larger capacitors can be used if high output current surges are anticipated. The ADP3303 is stable with extremely low ESR capacitors (ESR 0), such as Multilayer Ceramic Capacitors (MLCC) or OSCON. Input Bypass Capacitor: an input bypass capacitor is not required; for applications where the input source is high impedance or far from the input pins, a bypass capacitor is recommended. Connecting a 0.47 F capacitor from the input pins to ground reduces the circuit's sensitivity to PC board layout. If a larger value output capacitor is used, then a larger value input capacitor is also recommended.
Noise Reduction
A noise reduction capacitor (CNR) can be used to further reduce the noise by 6 dB-10 dB (Figure 21). Low leakage capacitors in the 10 nF-100 nF range provide the best performance. Since the noise reduction pin (NR) is internally connected to a high impedance node, any connection to this node should be carefully done to avoid noise pickup from external sources. The pad connected to this pin should be as small as possible. Long PC board traces are not recommended.
NR 3
ADP3303-5.0
7 VIN C1 + 1F 8 1 IN OUT 2
CNR 10nF VOUT = 5V R1 330k EOUT + C2 10 F
SD 5 ON OFF SD
ERR 6 GND 4
Figure 21. Noise Reduction Circuit
-6-
REV. A
ADP3303
Thermal Overload Protection
The ADP3303 is protected against damage due to excessive power dissipation by its thermal overload protection circuit, which limits the die temperature to a maximum of 165C. Under extreme conditions (i.e., high ambient temperature and power dissipation), where die temperature starts to rise above 165C, the output current is reduced until the die temperature has dropped to a safe level. The output current is restored when the die temperature is reduced. Current and thermal limit protections are intended to protect the device against accidental overload conditions. For normal operation, device power dissipation should be externally limited so that junction temperatures will not exceed 125C.
Calculating Junction Temperature
It is not recommended to use solder mask or silkscreen on the PCB traces adjacent to the ADP3303's pins since it will increase the junction to ambient thermal resistance of the package.
COPPER LEAD-FRAME 1 8
2 COPPER PADDLE 3
7
6
Device power dissipation is calculated as follows: PD = (VIN - VOUT) ILOAD + (VIN) IGND Where ILOAD and IGND are load current and ground current, VIN and VOUT are input and output voltages, respectively. Assuming ILOAD = 200 mA, IGND = 2 mA, VIN = 7 V and VOUT = 5.0 V, device power dissipation is: PD = (7 V - 5 V ) 200 mA + (7 V ) 2 mA = 414 mW The proprietary package used in ADP3303 has a thermal resistance of 96C/W, significantly lower than a standard 8-lead SOIC package at 170C/W. Junction temperature above ambient temperature will be approximately equal to: 0.414 W x 96C/W = 39.7C To limit the maximum junction temperature to 125C, maximum ambient temperature must be lower than: TAMAX = 125C - 40C = 85C
Printed Circuit Board Layout Consideration
4
5
Figure 22. Thermal Coastline
Error Flag Dropout Detector
The ADP3303 will maintain its output voltage over a wide range of load, input voltage and temperature conditions. If, for example, the output is about to lose regulation by reducing the supply voltage below the combined regulated output and dropout voltages, the ERR flag will be activated. The ERR output is an open collector, which will be driven low. Once set, the ERR flag's hysteresis will keep the output low until a small margin of operating range is restored either by raising the supply voltage or reducing the load.
Shutdown Mode
All surface mount packages rely on the traces of the PC board to conduct heat away from the package. In standard packages, the dominant component of the heat resistance path is the plastic between the die attach pad and the individual leads. In typical thermally enhanced packages, one or more of the leads are fused to the die attach pad, significantly decreasing this component. To make the improvement meaningful, however, a significant copper area on the PCB must be attached to these fused pins. The patented thermal coastline lead frame design of the ADP3303 (Figure 22) uniformly minimizes the value of the dominant portion of the thermal resistance. It ensures that heat is conducted away by all pins of the package. This yields a very low, 96C/W, thermal resistance for an SO-8 package, without any special board layout requirements, relying on the normal traces connected to the leads. The thermal resistance can be decreased by approximately an additional 10% by attaching a few square cm of copper area to the IN pin of the ADP3303.
Applying a TTL high signal to the shutdown (SD) pin, or tying it to the input pin, will turn the output ON. Pulling SD down to 0.3 V or below, or tying it to ground, will turn the output OFF. In shutdown mode, quiescent current is reduced to much less than 1 A.
APPLICATION CIRCUITS Crossover Switch
The circuit in Figure 23 shows that two ADP3303s can be used to form a mixed supply voltage system. The output switches between two different levels selected by an external digital input. Output voltages can be any combination of voltages from the Ordering Guide.
REV. A
-7-
ADP3303
MJE253*
VIN = 5.5V TO 12V OUTPUT SELECT
5V 0V
IN
OUT
VOUT = 5V/3.3V
VIN = 6V TO 8V C1 47 F
ADP3303-5.0
SD GND
R1 50
VOUT = 5V @ 1A
IN
OUT
IN C1 1.0 F SD GND
OUT
ADP3303-3.3
C2 0.47 F
SD GND
ERR
*AAVID531002 HEATSINK IS USED
Figure 23. Crossover Switch
Higher Output Current
Figure 24. High Output Current Linear Regulator
Constant Dropout Post Regulator
The ADP3303 can source up to 200 mA without any heatsink or pass transistor. If higher current is needed, an appropriate pass transistor can be used, as in Figure 24, to increase the output current to 1 A.
The circuit in Figure 25 provides high precision with low dropout for any regulated output voltage. It significantly reduces the ripple from a switching regulator while providing a constant dropout voltage, which limits the power dissipation of the LDO to 60 mW. The ADP3000 used in this circuit is a switching regulator in the step-up configuration.
L1 6.8 H VIN = 2.5V TO 3.5V C1 100 F 10V
D1 1N5817
ADP3303-3.3
IN OUT GND 3.3V @ 160mA C3 2.2 F C2 100 F 10V SD
R1 120 ILIM VIN
R2 30.1k 1%
SW1 Q1 2N3906 FB R3 124k 1% Q2 2N3906 R4 274k
ADP3000-ADJ
GND SW2
Figure 25. Constant Dropout Post Regulator
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
8-Lead Small Outline IC (SO-8)
0.1968 (5.00) 0.1890 (4.80)
8 1 5 4
0.1574 (4.00) 0.1497 (3.80)
0.2440 (6.20) 0.2284 (5.80)
PIN 1 0.0098 (0.25) 0.0040 (0.10)
0.0688 (1.75) 0.0532 (1.35)
0.0196 (0.50) x 45 0.0099 (0.25)
SEATING PLANE
0.0500 0.0192 (0.49) (1.27) 0.0138 (0.35) BSC
0.0098 (0.25) 0.0075 (0.19)
8 0
0.0500 (1.27) 0.0160 (0.41)
-8-
REV. A
PRINTED IN U.S.A.
C2984a-1-12/98
ADP3303-5
C2 10 F

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